Design-Reuse

Accelerate partial reconfiguration with a 100% hardware solution

In many modern applications such as video processing, minimizing FPGA reconfiguration time is critical in order to avoid losing too many images. Partial reconfiguration is a technique that allows ...
EDN

FPGA partial reconfiguration mitigates variability

Design variability is rapidly becoming the “norm” for electronics products. From packaging to logic functionality, electronic end products are expected to be more customized and configurable based on ...
EDN

Altera to offer partial reconfiguration at 28-nm

SAN FRANCISCO—FPGA vendor Altera Corp. plans to introduce several innovations for its first 28-nm chips, including partial reconfiguration, 28-gigabit-per-second (Gbps) transceivers and embedded hard ...
Design-Reuse

Partial reconfiguration in FPGA rapid prototyping tools

FPGA rapid prototyping tools are greatly useful at the time of designing and testing complex signal processing systems, due to their graphic programming environment and the possibility they offer to ...
Electronics Weekly

Xilinx widens support for partial reconfiguration of FPGAs

Xilinx has announced the availability of its fourth generation partial reconfiguration design flow, with improvements to its intelligent clock gating technology. The company claimed a 24% reduction in ...