Electronic Design

SystemC Advances Set the Stage For New SoC Design Flow Strategy

A new specification for Open Core Protocol (OCP) users will present a seamless flow for complex system-on-a-chip (SoC) designs. Publication of the spec comes via the OCP International Partnership (OCP ...
EDN

SystemC ‘primer’ explains language basics

ALLENTOWN, Pa. — Noted EDA author J. Bhasker, architect at eSilicon, has turned his attention toward SystemC in his latest book, A SystemC Primer. The textbook provides an overview of the language and ...
EDN

The war is over: C++ and SystemC coexist in a single flow

Since its debut in 2004, the current generation of high-level synthesis (HLS) tools has made tremendous progress in terms of both quality of results (QoR) and wider applicability. The success of this ...
Electronic Design

Implement Abstraction By Encapsulation In SystemC

High-level design (HLD) represents a hardware design at a more abstract level than register transfer level (RTL). A high-level synthesis (HLS) tool then can be used to produce the RTL necessary to ...
Design-Reuse

Refactoring Hardware Algorithms to Functional Timed SystemC Models

SystemC Modelling is an emerging technology used for SoC Verification and termed as Virtual Platforms. Virtual platforms are Simulation Environment of the SoC. SystemC is a high level language and the ...
Design-Reuse

Open SystemC Initiative Advances IP Interoperability and Reuse with New Draft Standard for Transaction-Level Modeling

SystemC users urged to provide feedback on TLM-2 Draft 2 by January 31st SAN JOSE, Calif. December 4, 2007 The Open SystemC Initiative (OSCI), an independent non-profit organization dedicated to ...